1. Field of Invention
The present invention generally relates to an apparatus for increasing the slew rate, and more particularly, to an apparatus that increases the slew rate, reduces the area used and saves power consumption.
2. Description of Related Art
The slew rate is defined as a time variation rate of the voltage output from the closed loop operational amplifier (OP AMP) when it is operated under a large signal condition. Generally speaking, when a user inputs the voltage to the input terminal of the operational amplifier, it is desired that the output terminal of the operational amplifier can rapidly reach a voltage level that is the same as the input voltage.
However, since the operation of the physical operational amplifier is limited by the slew rate, the output voltage does not reach the same level as the input voltage for a certain time period. For example, if the input voltage is 15V, and the slew rate of the operational amplifier is 0.5V/xcexcs, since the variation of the output voltage cannot exceed 0.5V/xcexcs, only after waiting for 30 xcexcs, can the output voltage reach the desired 15V. Therefore, the performance of the operational amplifier can be improved by increasing the slew rate of the operational amplifier.
When the conventional operational amplifier is to drive a rather large load in capacitive type, in order to increase the slew rate, it usually needs to consume a large amount of static current to achieve the characteristic of high slew rate. For the description in clarity, as shown in FIG. 1, it is a drawing block diagram, schematically illustrating the conventional operation amplifier in two stages. In FIG. 1, the first stage amplifier 101 is input with a voltage Vin, which is converted into a current I in the first stage. The current I will compensate the capacitor CM for charging/discharging, so that the slew rate SR=I/CM, and the slew rate is related with the first stage current of the operational amplifier. However, when the load is a large capacitor, if the driving ability at the second stage, i.e. output stage, is insufficient, then the slew rate cannot be described by the foregoing formula. Therefore, a second stage amplifier 102 is necessary to improve the driving ability. In this manner, it is necessary to increase the size of the second stage. This then causes an increase of the static current for the operation amplifier.
In order to reduce the static current consumption, a circuit diagram of a conventional apparatus for increasing the slew rate is shown in FIG. 2. From FIG. 2, the apparatus for increasing the slew rate 20 comprises an operational amplifier 202, an error amplifier 204, and a push-pull output stage (also known as a common source output stage) 206. The error amplifier 204 comprises an operational amplifier 208 and an operational amplifier 210. The push-pull output stage 206 comprises a transistor 212 and a transistor 214. The transistor 212 is a P type Metal-Oxide-Semiconductor (MOS) filed transistor, and a source of the transistor 212 couples to a positive voltage VDD. The transistor 214 is an N type MOS filed transistor, and a source of the transistor 214 couples to the ground. The apparatus for increasing slew rate 20 is operated under the principle of when the output voltage V0 is greater than the output voltage V1 of the operational amplifier 202, the output voltage V2 of the operational amplifier 208 turns on the transistor 212, and the output voltage V3 of the operational amplifier 210 turns off the transistor 214. At this time, the transistor 212 pushes (also known as source) current into the output terminal. When the output voltage V0 is smaller than the output voltage V1 of the operational amplifier 202, the output voltage V2 of the operational amplifier 208 turns off the transistor 212, and the output voltage V3 of the operational amplifier 210 turns on the transistor 214. At this time, the transistor 214 pulls (also known as sink) current into the output terminal. Moreover, when the output voltage V0 is equal to the output voltage V1 of the operational amplifier 202, the output voltage V2 of the operational amplifier 208 will bias the transistor 212 under a quiescent current Iq, and the output voltage V3 of the operational amplifier 210 will bias the transistor 214 to Iq too. At this time, the output terminal is V0 equal to the output voltage V01 of the operational amplifier 202. Since the apparatus for increasing the slew rate 20 has to deploy operational amplifier 208 and operational amplifier 210, a greater area is used and a greater amount of the power is consumed, and it also generates offset voltage and oscillation problems.
Therefore, the present invention provides an apparatus for increasing the slew rate. Since the present invention only deploys an operational amplifier and a push-pull output stage and does not deploy the error amplifier, the present invention reduces occupied area and saves consumed power.
In order to achieve the objectives mentioned above and others, the present invention provides an apparatus for increasing the slew rate. The apparatus for increasing the slew rate comprises an operational amplifier, a pull-up transistor, and a pull-down transistor. The operational amplifier mentioned above comprises a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal receives an input signal, the inverting input terminal couples to the output terminal, and the output terminal generates an output signal. The pull-up transistor mentioned above comprises a first drain, a first gate, and a first source. The first drain couples to a supply voltage, the first gate couples to the non-inverting input terminal, and the first source couples to the output terminal. The pull-down transistor mentioned above comprises a second drain, a second gate, and a second source. The second drain couples to the ground, the second gate couples to the first gate and the non-inverting input terminal, and the second source couples to the first source and the output terminal.
In a preferred embodiment of the present invention, when the result voltage obtained from the output signal subtracted from the input signal is greater than or equal to the threshold voltage of the pull-up transistor and the result voltage obtained from the input signal subtracted from the output signal is less than the threshold voltage of the pull-down transistor, the pull-up transistor is ON and the pull-down transistor is OFF. At this time, the pull-up transistor pushes source current to the output terminal.
In a preferred embodiment of the present invention, when the result of the output signal subtracted from the input signal is less than the threshold voltage of the pull-up transistor, and the result of the input signal subtracted from the output signal is greater than or equal to the threshold voltage of the pull-down transistor, the pull-up transistor is OFF and the pull-down transistor is ON. At this time, the pull-down transistor pulls sinks current to the output terminal.
In a preferred embodiment of the present invention, when the result of the output signal subtracted from the input signal is less than the threshold voltage of the pull-up transistor, and the result of the input signal subtracted from the output signal is also less than the threshold voltage of the pull-down transistor, both the pull-up transistor and the pull-down transistor are OFF. At this time, the output terminal is driven by the operational amplifier.
In a preferred embodiment of the present invention, the pull-up transistor is an n type MOS field transistor, and the pull-down transistor is a p type MOS filed transistor.
In a preferred embodiment of the present invention, the pull-up transistor and the pull-down transistor constitute a push-pull output stage.
In a preferred embodiment of the present invention, the supply voltage is a positive voltage, and this positive voltage is provided by a power supply.
The present invention further provides an apparatus for increasing the slew rate. The apparatus for increasing the slew rate comprises an operational amplifier and a push-pull output stage. The operational amplifier mentioned above comprises a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal receives an input signal, the inverting input terminal couples to the output terminal, and the output terminal generates an output signal. The push-pull output stage mentioned above comprises an input terminal and an output terminal. The input terminal couples to the non-inverting input terminal, and the output terminal couples to the output terminal.
In a preferred embodiment of the present invention, the push-pull output stage comprises a pull-up transistor and a pull-down transistor. The pull-up transistor mentioned above comprises a first drain, a first gate, and a first source. The first drain couples to the supply voltage, the first gate couples to the non-inverting input terminal, and the first source couples to the output terminal. The pull-down transistor mentioned above comprises a second drain, a second gate, and a second source. The second drain couples to the ground, the second gate couples to the first gate and the non-inverting input terminal, and the second source couples to the first source and the output terminal
In summary, since the present invention only deploys an operational amplifier and a push-pull output stage and does not deploy the error amplifier, the present invention reduces occupied area and saves consumed power, and also avoids the offset voltage and oscillation problems.